Memory device with a low-current reference circuit

A memory device comprising:

• a memory cell unit including a memory cell;
• a sense amplifier coupled to the memory cell unit and configured to compare a current that flows through the memory cell to a reference current to sense a bit of data stored in the memory cell and to output the amplified bit of data;
• and
• a reference circuit coupled to the sense amplifier, configured to generate the reference current, and including
• a pair of magnetic resistive elements coupled in parallel and in a high resistance state;
• a pair of transistors coupled to the magnetic resistive elements and coupled to each other;
• and
• a metal short between the pair of magnetic resistive elements and the pair of transistors, the metal short configured to control the generation of the reference current through one transistor of the pair of transistors.

A method comprising:

• generating a reference current that corresponds to a resistance of a magnetic resistive element that is in a high resistance state, a resistance of a resistive unit that has a substantially constant resistance, and a metal short between the magnetic resistive element and a pair of transistors, the pair of transistors coupled to each other;
• comparing a current that flows through a memory cell to the reference current to sense a bit of data stored in the memory cell;
• and
• providing as an output the sensed bit of data.