Spatial temporal phase shifted polarity aware dither

A computing device comprising:

• a display panel;
• and
• a processor connected to the display panel, the processor configured to compile display output data in accordance with dither patterns that are associated with different phases, the phases are shifted over a sequence of image frames, wherein the display panel is associated with different refresh rates and the processor is further configured to:
• track a first count of a first phase is used within a cycle;
• track a second count of a second phase is used within the cycle;
• and
• bypass a dither pattern associated with the first phase when the first count exceeds the second count within the cycle.

A system comprising:

• a display;
• a processor;
• and
• a memory that is configured to store instructions that when executed by the processor, cause the system to perform operations comprising:
• receiving an input corresponding to a first block of pixel data for the display;
• selecting a block dither pattern according to a spatial pattern of least significant bits in the first block of pixel data, wherein each block dither pattern is associated with a phase, wherein the phase is shifted over the sequence of frames;
• tracking a first count of a first phase and a second count of a second phase used within a cycle;
• bypassing a block dither pattern associated with the first phase when the first count exceeds the second count within the cycle;
• and
• outputting, to the display, a sequence of second blocks of pixel data for display by the display over a sequence of frames, each second block of pixel data being based on the block dither pattern.