System and method for controlling the impact of periodic jitter caused by non-ideal phase interpolators

A method for controlling periodic jitter arising from a phase interpolator (PI), comprising:

• receiving incoming data;
• receiving a reference clock of a phase-locked loop (PLL);
• measuring a parts per million (PPM) offset between the incoming data and the reference clock, of a first PI;
• and
• restricting jitter arising from the first PI, to frequencies within a predefined bandwidth, by tuning a center frequency of the PLL using a digital-analog converter (DAC) to reduce the PPM offset of the first PI, wherein the jitter arising from the first PI comprises jitter arising from non-linear phases of the first PI.

A system for controlling periodic jitter arising from a phase interpolator (PI), comprising:

• a receiver configured to receive incoming data;
• a fractional-N phase-locked loop (PLL) configured to receive a reference clock, wherein N is an integer;
• and
• measurement circuitry configured to measure a parts per million (PPM) offset between the incoming data and the reference clock, of a first PI,
• wherein the fractional-N PLL is further configured to restrict jitter arising from the first PI, to frequencies within a predefined bandwidth, by tuning a center frequency of the fractional-N PLL to reduce the PPM offset of the first PI, wherein the jitter arising from the first PI comprises jitter arising from non-linear phases of the first PI.