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US 10,312,377 B2Granted
Localized fin width scaling using a hydrogen anneal
AssigneesInternational Business Machines Corporation, Renesas Electronics Corporation
InventorsVeeraraghavan S. Basker, Shogo Mochizuki, Tenko Yamashita, Chun-Chen Yeh
Life of this patent
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Abstract
Transistors including one or more semiconductor fins formed on a substrate. The one or more semiconductor fins are thinner in a channel region than in source and drain regions and have rounded corners. There is a gate stack on the channel region of the one or more semiconductor fins.
Claims17
A transistor, comprising:
- at least one semiconductor fin formed on a substrate, wherein a profile of the at least one semiconductor fin is entirely convex and is widest at the bottom and tapers toward the top, and wherein the at least one semiconductor fin is thinner in a channel region than in source and drain regions and has rounded corners;
- and
- a gate stack on the channel region of the at least one semiconductor fin.
A transistor, comprising:
- at least one semiconductor fin formed on a substrate, wherein a profile of the at least one semiconductor fin is entirely convex and is widest at the bottom and tapers toward the top, and wherein the at least one semiconductor fin is thinner in a channel region than in source and drain regions and has rounded corners;
- a gate dielectric layer on the channel region of the at least one semiconductor fin;
- and
- a gate structure on the gate dielectric layer.
1 more element
A transistor, comprising:
- at least one semiconductor fin formed on a substrate, wherein the at least one semiconductor fin is thinner in a channel region than in source and drain regions and have rounded corners;
- an oxide capping layer on the at least one semiconductor fin;
- a gate dielectric layer on the channel region of the at least one semiconductor fin;
- and
- a gate structure on the gate dielectric layer.
2 more elements
Dependencies are inferred from the claim text.