High voltage semiconductor devices and methods for their fabrication

A method of fabricating a semiconductor device, the method comprising:

• implanting a first dopant having a first conductivity type in a portion of a partially-formed semiconductor substrate to form a portion of a composite drift region;
• forming an upper epitaxial layer over the partially-formed semiconductor substrate, wherein a semiconductor substrate includes the partially-formed semiconductor substrate and the upper epitaxial layer;
• forming a gate structure over the upper epitaxial layer,
• forming an additional portion of the composite drift region by implanting a second dopant having the first conductivity type in the upper epitaxial layer, wherein the composite drift region is aligned with a side of the gate structure upon forming the additional portion of the composite drift region;
• forming a source region and a drain region in the semiconductor substrate, wherein the drain region is substantially aligned with the portion of the semiconductor substrate in which the first dopant is implanted, and wherein the composite drift region extends laterally from the drain region to at least the side of the gate structure;
• and
• forming a well region in the semiconductor substrate, the well region configured to form a channel during operation of the semiconductor device.