Reducing resistance of bottom source/drain in vertical channel devices

A computer system comprising one or more processors, one or more computer-readable memories, and one or more computer-readable storage devices, and program instructions stored on at least one of the one or more storage devices for execution by at least one of the one or more processors via at least one of the one or more memories, the stored program instructions comprising:

• program instructions to create, during a fabrication of a semiconductor device, in a substrate material disposed along a direction of a plane of fabrication, a recess;
• program instructions to form, in the recess, a layer of a removable material;
• program instructions to form, above the layer of removable material, a bottom layer, wherein a backside of the bottom layer is a side of the bottom layer that faces the layer of removable material;
• program instructions to form, in a direction substantially orthogonal to the direction of the plane of fabrication, a vertical channel above the bottom layer;
• program instructions to form, above the bottom layer and relative to the vertical channel, a gate using a metal;
• program instructions to create a tunnel under the bottom layer by removing the removable material from under the bottom layer such that the backside of the bottom layer forms a ceiling of the tunnel;
• program instructions to fill the tunnel using a conductive material such that the conductive material makes electrical contact with the backside of the bottom layer;
• and
• program instructions to electrically connect a contact with the conductive material filled in the tunnel to form an electrical connection with the backside of the bottom layer.