FinFETs having dielectric punch-through stoppers
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-Hung Chang, Chen-Hua Yu, Chen-Nan Yeh
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Abstract
A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.
Claims20
A semiconductor device comprising:
- a semiconductor substrate having a topmost surface;
- a planar transistor on the topmost surface of the semiconductor substrate;
- and
- a FinFET on the semiconductor substrate, the FinFET comprising:
- a semiconductor fin having a topmost surface that is substantially level with the topmost surface of the semiconductor substrate;
- and
- a first isolation structure extending between the semiconductor fin and the semiconductor substrate.
A semiconductor device comprising:
- a semiconductor substrate;
- a planar transistor comprising a source/drain region disposed in a topmost surface of the semiconductor substrate;
- a fin having a topmost surface substantially level with the topmost surface of the semiconductor substrate and extending below the topmost surface of the semiconductor substrate, the fin including an upper portion and a lower portion;
- a first isolation structure interjacent the upper portion of the fin and the lower portion of the fin;
- and
- a first gate structure over and extending along sidewalls of the fin.
A semiconductor device comprising:
- a semiconductor substrate having a topmost surface;
- a planar transistor on the topmost surface of the semiconductor substrate;
- and
- a FinFET on the semiconductor substrate, the FinFET comprising:
- a semiconductor fin having a topmost surface that is substantially level with the topmost surface of the semiconductor substrate;
- and
- a first isolation structure extending between the semiconductor fin and the semiconductor substrate, wherein the semiconductor fin has a first sidewall and a second sidewall opposite the first sidewall, and wherein the first isolation structure extends from the first sidewall to the second sidewall.
Dependencies are inferred from the claim text.