Trigate device with full silicided epi-less source/drain for high density access transistor applications
AssigneeInternational Business Machines Corporation
InventorsMichael A. Guillorn, Fei Liu, Zhen Zhang
Life of this patent
Estimating the term…
Loading patent…
AssigneeInternational Business Machines Corporation
InventorsMichael A. Guillorn, Fei Liu, Zhen Zhang
Estimating the term…
After forming a laterally contacting pair of a semiconductor fin and a conductive strap structure overlying a deep trench capacitor embedded in a substrate and forming a gate stack straddling a body region of the semiconductor fin, source/drain regions are formed in portions the semiconductor fin located on opposite sides of the gate stack by ion implantation. Next, a metal layer is applied over the source/drain region and subsequent annealing consumes entire source/drain regions to provide fully alloyed source/drain regions. A post alloyzation ion implantation is then performed to introduce dopants into the fully alloyed source/drain regions followed by an anneal to segregate the implanted dopants at interfaces between the fully alloyed source/drain regions and the body region of the semiconductor fin.
A semiconductor structure comprising:
A semiconductor structure comprising:
Dependencies are inferred from the claim text.