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US 10,312,311 B2Granted
Thin film transistor, fabrication method thereof, array substrate, and display device
AssigneeBoe Technology Group Co., Ltd.
InventorsZheng Liu, Xiaolong Li, Lujiang Huang Fu
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Abstract
The disclosed subject matter provides a thin film transistor and a fabricating method thereof. The thin film transistor includes a substrate, a source electrode and a drain electrode on the substrate, an active layer on the source and drain electrodes, a gate insulating layer on the active layer, and a gate electrode on the gate insulating layer. The active layer extends from the source electrode towards the drain electrode along a non-linear path.
Claims20
A thin film transistor, comprising:
- a substrate;
- a source electrode and a drain electrode on the substrate;
- an active layer on the source electrode and the drain electrode, the active layer extending from the source electrode towards the drain electrode along a non-linear path;
- and
- an intermediate insulating layer, a portion of the intermediate insulating layer being arranged on the source electrode and the drain electrode and forming a raised profile layer from the substrate;
- wherein:
- the non-linear path of the active layer includes a first portion and a second portion connecting the first portion, the second portion extending in a direction away from the substrate and along the raised profile of the portion of the intermediate insulating layer, and
- the active layer along the first portion of the non-linear path contacts the source and drain electrodes, and the active layer along the second portion of the non-linear path contacts the intermediate insulating layer.
5 more elements
A method for fabricating a thin film transistor, comprising:
- providing a substrate;
- forming a source electrode and a drain electrode on the substrate;
- forming an intermediate insulating layer, a portion of the intermediate insulating layer being arranged on the source electrode and the drain electrode and forming a raised profile away from the substrate;
- forming a polysilicon layer between the source electrode and the drain electrode;
- forming a gate insulating layer on the polysilicon layer;
- forming a gate electrode on the gate insulating layer;
- and
- using the gate electrode as a mask, implanting ions into the polysilicon layer to form an active layer including a source region, a drain electrode region, and a channel region that is not subject to the ion implantation;
- wherein:
- the active layer extends from the source electrode towards the drain electrode along a non-linear path,
- the non-linear path of the active layer includes a first portion and a second portion connecting the first portion, the second portion extending towards the gate electrode and along the raised profile of the intermediate insulating layer, and
- the active layer along the first portion of the non-linear path contacts the source and drain electrodes, and the active layer along the second portion of the non-linear path contacts the intermediate insulating layer.
9 more elements
Dependencies are inferred from the claim text.