Thin film transistor, array substrate and manufacturing method thereof, and display panel
AssigneeBoe Technology Group Co., Ltd.
InventorSeungjin Choi
Life of this patent
Estimating the term…
Abstract
Provided is a thin film transistor, which comprises a gate electrode; a source electrode; and a drain electrode, wherein at least one electrode of the gate electrode, the source electrode and the drain electrode has a plurality of first grooves formed on an upper surface thereof. An array substrate, a display panel and a manufacturing method of an array substrate are also provided. In manufacturing the thin film transistor, the pattern is accurate and the yield is high.
Claims17
A thin film transistor comprising:
- a gate electrode;
- a source electrode;
- and
- a drain electrode, wherein
- at least one electrode among the gate electrode, the source electrode and the drain electrode has a plurality of first grooves formed in an upper surface thereof,
- wherein the electrode having the plurality of first grooves formed in the upper surface thereof comprises:
- a main electrode layer;
- and
- a protection electrode layer provided above the main electrode layer, wherein
- the plurality of first grooves are formed in an upper surface of the protection electrode layer.
A display panel comprising an array substrate, wherein the array substrate comprises:
- a plurality of thin film transistors, wherein for each thin film transistor of the plurality of thin film transistors, the thin film transistor comprises a gate electrode, a source electrode, and a drain electrode, wherein at least one electrode among the gate electrode, the source electrode and the drain electrode has a plurality of first grooves formed in an upper surface thereof, and wherein the electrode having the plurality of first grooves formed in the upper surface thereof comprises a main electrode layer and a protection electrode layer provided above the main electrode layer, wherein the plurality of first grooves are formed in an upper surface of the protection electrode layer;
- and
- multiple groups of electrode lines including gate lines provided in a same layer as the gate electrode and data lines provided in a same layer as the source electrode and the drain electrode, Wherein each electrode line of at least one group of electrode lines has a plurality of second grooves formed in an upper surface thereof.
A manufacturing method of an array substrate, wherein the array substrate comprises a plurality of gate lines and a plurality of data lines, the gate lines and the data lines are intersected with each other to divide the array substrate into a plurality of pixel units, each of which is provided therein with a thin film transistor, wherein the manufacturing method comprises steps of:
- forming a first pattern;
- and
- forming a second pattern, wherein
- the first pattern includes the gate lines and a pattern of gate electrodes of the thin film transistors, and the second pattern includes the data lines and a pattern of source electrodes and drain electrodes of the thin film transistors, and wherein
- at least one of the step of forming the first pattern and the step of forming the second pattern further comprises:
- forming a conductive material layer;
- forming a plurality of grooves in an upper surface of the conductive material layer;
- coating a photoresist layer on the conductive material layer formed with the grooves;
- exposing and developing the photoresist to form a shielding pattern on the upper surface of the conductive material layer;
- and
- etching the conductive material layer formed with the shielding pattern.
Dependencies are inferred from the claim text.