Two transistor FinFET-based split gate non-volatile floating gate flash memory and method of fabrication

A method of forming a non-volatile memory cell comprising:

• forming trenches into an upper surface of a semiconductor substrate so that the upper surface includes an upwardly extending fin that includes first and second side surfaces that oppose each other and an upwardly extending second fin that includes third and fourth side surfaces that oppose each other;
• forming a first electrode in electrical contact with a first portion of the fin;
• forming a second electrode in electrical contact with a second portion of the fin, wherein the first and second portions of the fin are spaced apart from each other such that a channel region of the fin includes portions of the first and second side surfaces and extends between the first and second portions of the fin;
• forming a floating gate that extends along a first portion of the channel region, wherein the floating gate extends along and is insulated from the first side surface, wherein no portion of the floating gate extends along the second side surface, wherein at least a portion of the floating gate is disposed between the fin and the second fin and extends along and is insulated from the third side surface, and wherein no portion of the floating gate extends along the fourth side surface;
• forming a word line gate that extends along a second portion of the channel region, wherein the word line gate extends along and is insulated from the first and second side surfaces;
• forming a control gate disposed over and insulated from the floating gate;
• forming an erase gate having a first portion disposed laterally adjacent to and insulated from the floating gate and a second portion disposed vertically over and insulated from the floating gate.