Techniques providing metal gate devices with multiple barrier layers

A device comprising:

• a high-k (HK) dielectric layer disposed over a semiconductor substrate;
• a first metal compound layer disposed over a first portion and a second portion of the HK dielectric layer, wherein the first metal compound layer includes a non-plasma deposited first nitride compound layer physically contacting the first and second portions HK dielectric layer;
• a second metal compound layer disposed over the first metal compound layer that is disposed over the first and second portions of the HK dielectric layer, wherein the second metal compound layer includes a plasma deposited second nitride compound layer disposed above the non-plasma deposited first nitride compound layer;
• a first stack of metal gate layers disposed over the first and second metal compound layers disposed over the first portion of the HK dielectric layer, the first stack of metal gate layers including a first work function metal layer;
• and
• a second stack of metal gate layers disposed over the first and second metal compound layers disposed over the second portion of the HK dielectric layer, the second stack of metal gate layers including a second work function metal layer different from the first work function metal layer, wherein the first stack of metal gate layers is associated with a first type of conductivity and the second stack of metal gate layers is associated with a second type of conductivity that is opposite the first type of conductivity.

A device comprising:

• a first gate structure and a second gate structure formed over a semiconductor substrate;
• a first sidewall spacer formed along a first sidewall of the first gate structure and a second sidewall spacer along an opposing second sidewall of the first gate structure;
• an interlayer dielectric layer formed over the first and second gate structures,
• wherein the first gate structure includes:
• a first high-k dielectric layer;
• a first metal compound layer disposed over the first high-k dielectric layer, the first metal compound layer including a non-plasma deposited first nitride compound layer physically contacting the first high-k dielectric layer;
• a second metal compound layer disposed over the first metal compound layer, the second metal compound layer including a plasma deposited second nitride compound layer disposed above the non-plasma deposited first nitride compound layer;
• and
• a first work function metal layer disposed over the second metal compound layer;
• and
• wherein the second gate structure includes:
• a second high-k dielectric layer;
• a third metal compound layer disposed over the second high-k dielectric layer, the third metal compound layer including a non-plasma deposited third nitride compound layer physically contacting the second high-k dielectric layer, the non-plasma deposited third nitride compound layer and the non-plasma deposited first nitride compound layer being formed of the same material;
• a fourth metal compound layer disposed over the third metal compound layer, the fourth metal compound layer including a plasma deposited fourth nitride compound layer disposed above the non-plasma deposited third nitride compound layer;
• and
• a second work function metal layer different from the first work function metal layer disposed over the fourth metal compound layer, wherein a type of conductivity associated with the second work function metal layer is opposite a type of conductivity associated with the first work function metal layer.