Stacked dies and dummy components for improved thermal performance

A semiconductor chip device, comprising:

• a stack of plural semiconductor chips, each two adjacent semiconductor chips of the stack of plural semiconductor chips being electrically connected by plural interconnects and physically connected by a first insulating bonding layer, the first insulating bonding layer including a first insulating layer and a second insulating layer bonded to the first insulating layer;
• a first stack of dummy chips positioned opposite a first side of the stack of semiconductor chips and separated from the plural semiconductor chips by a first gap, each two adjacent of the first stack of dummy chips being physically connected by a second insulating bonding layer, the second insulating bonding layer including a first insulating layer and a second insulating layer bonded to the first insulating layer;
• a second stack of dummy chips positioned opposite a second side of the stack of semiconductor chips and separated from the stack of plural semiconductor chips by a second gap, each two adjacent of the second stack of dummy chips being physically connected by a third insulating bonding layer, the third insulating bonding layer including a first insulating layer and a second insulating layer bonded to the first insulating layer;
• and
• an insulating layer in the first gap and another insulating layer in the second gap.

A method of manufacturing, comprising:

• stacking a second semiconductor chip on a first semiconductor chip;
• forming a first insulating bonding layer between the first semiconductor chip and the second semiconductor chip bonding the first semiconductor chip to the second semiconductor chip, the first insulating bonding layer including a first inorganic insulating layer and a second inorganic insulating layer bonded to the first inorganic insulating layer;
• forming plural interconnects between and electrically connecting the first semiconductor chip and the second semiconductor chip;
• stacking a first dummy component on the first semiconductor chip and separated from the second semiconductor chip by a first gap;
• forming a second insulating bonding layer between the first dummy component and the first semiconductor chip and bonding the first dummy component to the first semiconductor chip, the second insulating bonding layer including a first inorganic insulating layer and a second inorganic insulating layer bonded to the first inorganic insulating layer;
• and
• forming an inorganic insulating layer in the first gap.