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US 10,312,197 B2Granted
Method of manufacturing semiconductor device and semiconductor device
AssigneeToshiba Memory Corporation
InventorsYuusuke Takano, Takashi Imoto, Takeshi Watanabe, Soichi Homma, Katsunori Shibuya
Life of this patent
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Abstract
According to one embodiment, a method of manufacturing a semiconductor device includes forming a sealing resin layer containing an inorganic filler so as to seal a semiconductor chip, removing a portion of the surface of the sealing resin layer by dry etching such that a portion of the inorganic filler is exposed, and forming a shield layer so as to cover at least the sealing resin layer.
Claims19
A method of manufacturing a semiconductor device, the method comprising:
- mounting a plurality of semiconductor chips on a surface of a wiring board;
- enclosing the plurality of semiconductor chips on the surface of the wiring board in a sealing resin comprising an inorganic filler and an organic resin;
- cutting the wiring board and the sealing resin into a plurality of sealing resin layers each having at least one semiconductor chip therein;
- placing a separated sealing resin layer in a vacuum environment;
- removing a portion of the separated sealing resin layer by dry etching such that a portion of inorganic filler exposed at front and side surfaces of the sealing resin layer to form irregularities on the front and side surfaces of the sealing resin, the dry etching being carried out by sputter etching the surfaces of the at least one separated sealing resin layer within the vacuum environment;
- and
- forming a shield layer on the separated sealing resin layer by sputter deposition in the vacuum environment, the shield layer contacting the exposed portion of the inorganic filler on the front and side surfaces of the separated sealing resin layer, the shield layer being formed without removing the separated sealing resin layer from the vacuum environment after the dry etching.
4 more elements
A method of manufacturing a semiconductor device, the method comprising:
- mounting a plurality of semiconductor chips on a surface of a substrate, the substrate including an inner conductive layer electrically connected to a ground terminal of each semiconductor chip using at least one via exposed at the surface of the substrate;
- covering the plurality of semiconductor chips on the surface of the substrate with a sealing resin comprising an inorganic filler and an organic resin;
- cutting the sealing resin and the substrate to form a plurality of sealing resin layers, each having a semiconductor chip therein, the inner conductive layer of the substrate being exposed at a side edge of each sealing resin layer;
- placing a separated sealing resin layer in a vacuum environment;
- reverse sputter etching the front and side surfaces of the separated sealing layer in the vacuum environment to remove portions of the separated sealing layer to a depth between 2.5 nm and 7.5 nm such that a portion of the inorganic filler is exposed at the front and side surfaces of the separated sealing resin layer and irregularities are formed on the front and side surfaces of the separated sealing resin layer;
- and
- forming a shield layer on the separated sealing resin layer by sputter deposition in the vacuum environment, the shield layer contacting the exposed portion of the inorganic filler and being electrically connected to the inner conductive layer at the side edge of the separated sealing resin layer, the shield layer being formed without removing the separated sealing resin layer from the vacuum environment after reverse sputter etching the separated sealing resin layer.
4 more elements
Dependencies are inferred from the claim text.