Advanced through substrate via metallization in three dimensional semiconductor integration

A method for fabricating a through substrate via structure comprising:

• providing a through substrate via in a substrate, the through substrate via having an aspect ratio greater than 10:1, vertical sidewalls and a horizontal bottom in an intermediate state, the substrate having a horizontal field area surrounding the through substrate via, the substrate being comprised of a semiconductor in which devices for an integrated circuit are embedded;
• depositing a metallic barrier layer on the sidewalls of the through substrate via;
• performing a nitridation process to convert a surface portion of the metallic barrier layer to a nitride surface layer;
• depositing a wetting enhancement liner layer on the nitride surface layer, wherein the nitride surface layer enhances the nucleation of the wetting enhancement layer;
• depositing a first metal layer to fill a portion of the through substrate via and cover the horizontal field area, wherein the deposition of the first metal layer includes a copper seed layer by a physical vapor deposition (PVD) process;
• performing a thermal anneal step to reflow a portion of the first metal layer on the horizontal field area into the through substrate via, including the copper seed layer which is reflowed so that the copper seed layer deposited by the PVD process fills a lower portion of the through substrate via;
• depositing a second seed layer by a PVD process on the reflowed copper seed layer;
• and
• depositing a second metal layer over the first metal layer to fill a remaining portion of the through substrate via, wherein the second metal layer is deposited on the second seed layer and the second seed layer substantially maintains a deposited form after depositing the second metal layer;
• wherein the through substrate via is a via which passes through the entire substrate in a finished state.