Semiconductor devices

A semiconductor device, comprising:

• a substrate including a main zone and an extension zone;
• an electrode structure including gate electrodes stacked on the substrate,
• each of the gate electrodes including a line region and a contact region,
• the line region extending from the main zone toward the extension zone,
• the contact region on an end of the line region and thicker than the line region,
• a top surface of the contact region being higher than a bottom surface of the line region of the gate electrode directly above the contact region,
• an interface between the line region and the contact region in a corresponding gate electrode among the gate electrodes being defined by a thickness transition, from a first thickness to a second thickness at a terminal region of the corresponding gate electrode, measured from a lower surface of the corresponding gate electrode to an upper surface of the corresponding gate electrode,
• the second thickness being greater than the first thickness, the contact region having the second thickness;
• and
• vertical channel structures on the main zone, the vertical channel structures penetrating the electrode structure,
• wherein each of the contact regions includes a lower portion connected to a corresponding one of the line regions and an upper portion protruding from a top surface of the corresponding one of the line regions such that the upper portion laterally protrudes over the corresponding one of the line regions, and
• a width of a top surface of the upper portion is greater than a width of a bottom surface of the upper portion.

A semiconductor device, comprising:

• a substrate;
• and
• a memory cell array on the substrate,
• the memory cell array including gate electrodes stacked on top of each other,
• each of gate electrodes including a line region and a contact region connected to an end of the line region,
• an interface between the line regions and the contact regions being defined by a thickness transition, from a first thickness to a second thickness at terminal regions of the gate electrodes, measured from a lower surface of the gate electrodes to an upper surface of the gate electrodes,
• the second thickness being greater than the first thickness, the contact regions having the second thickness,
• the gate electrodes including a first gate electrode over a second gate electrode,
• the line regions of the first and second gate electrodes being separated from each other by a first distance in a first direction vertical to a top surface of the substrate,
• the contact regions of the first and second gate electrodes being separated from each other by a second distance in a second direction that is parallel to the top surface of the substrate and less than the first distance,
• a top surface of the contact region of the first gate electrode being above a top surface of the line region of the first gate electrode, and
• a top surface of the contact region of the second gate electrode being above a top surface of the line region of the second gate electrode, wherein
• the contact regions each include a lower portion connected to a corresponding one of the line regions and an upper portion protruding from a top surface of the corresponding one of the line regions,
• a width of a top surface of the upper portion is greater than a width of a bottom surface of the upper portion, and
• the upper portion of the contact regions laterally protrudes over the line region.