Voltage degradation aware NAND array management
AssigneeMicron Technology, Inc.
InventorsSebastien Andre Jean, Harish Reddy Singidi
Life of this patent
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Abstract
Devices and techniques for voltage degradation aware NAND array management are disclosed herein. Voltage to a NAND device is monitored to detect a voltage event. A history of voltage events is modified with the voltage event. A voltage condition is observed from the history of voltage events. An operational parameter of a NAND array in the NAND device is then modified in response to the voltage condition.
Claims22
A memory device for voltage degradation aware memory array management, the memory device comprising:
- a memory array;
- and
- a controller to:
- detect a variation of a supply voltage to the memory array, the variation determined to be at least one of a threshold drop in supply voltage from an expected supply voltage or a difference in supply voltage between measurements of the supply voltage;
- record the variation of the supply voltage with other detected variations of the supply voltage to create a voltage event history, the voltage event history being a data structure managed by a controller of the memory device;
- and
- change operation of the memory array in response to a metric of voltage variations derived from the voltage event history, the metric of voltage variations measuring a deviation of the supply voltage from a supply voltage for reliable memory array write operations.
A method for voltage degradation aware memory array management, the memory device comprising:
- detecting a variation of a supply voltage to a memory array of a memory device, the variation determined to be at least one of a threshold drop in supply voltage from an expected supply voltage or a difference in supply voltage between measurements of the supply voltage;
- recording the variation of the supply voltage with other detected variations of the supply voltage to create a voltage event history, the voltage event history being a data structure managed by a controller of the memory device;
- and
- changing operation of the memory array in response to a metric of voltage variations derived from the voltage event history, the metric of voltage variations measuring a deviation of the supply voltage from a supply voltage for reliable memory array write operations.
Dependencies are inferred from the claim text.