Resistive memory transition monitoring

A method for monitoring a resistive memory having an array of cells coupled between respective bitlines and respective wordlines, the method comprising:

• determining, by a current determining circuit, a cell current and a cell current change rate of at least one of the cells;
• determining, by a control circuit, whether the cell current change rate is outside of a cell current change rate predefined range;
• and
• performing, by the control circuit, a predetermined action if the control circuit determination is positive,
• wherein the predetermined action is a static adjustment of a bitline voltage and/or a wordline voltage of the at least one cell, performed between cell resistance transition sequences.

A method for monitoring a resistive memory having an array of cells coupled between respective bitlines and respective wordlines, the method comprising:

• determining, by a current determining circuit, a cell current and a cell current change rate of at least one of the cells;
• determining, by a control circuit, whether the cell current change rate is outside of a cell current change rate predefined range;
• and
• performing, by the control circuit, a predetermined action if the control circuit determination is positive,
• wherein the predetermined action is replacing the at least one cell with a redundant cell.