Conductive metal oxide structures in non-volatile re-writable memory devices

A memory device comprising:

• a first memory layer comprising a plurality of row conductors and a plurality of column conductors arranged substantially orthogonal to the plurality of row conductors, where each intersection between one of the plurality of row conductors and one of the plurality of column conductors forms a memory cell;
• an address unit coupled to at least a portion of the row conductors and to at least a portion of the column conductors in the first memory layer, the address unit to receive an address, decode the address, and select a first memory cell corresponding to the address from the cross-point memory array;
• and
• a sense unit coupled to at least the portion of the row conductors and to at least the portion of the column conductors in the first memory layer, the sense unit to sense one or more currents flowing through at least one of the row conductors or the column conductors, the one or more currents indicative of stored data in the first memory cell.

A system comprising:

• a processing device;
• and
• a memory device coupled to the processing device, the memory device comprising:
• a cross-point memory array comprising a plurality of row conductors and a plurality of column conductors arranged substantially orthogonal to the plurality of row conductors, where each intersection between one of the plurality of row conductors and one of the plurality of column conductors forms a memory cell;
• an address unit coupled to at least a portion of the row conductors and to at least a portion of the column conductors in the cross-point memory array, the address unit to receive an address, decode the address, and select a first memory cell corresponding to the address from the cross-point memory array;
• and
• a sense unit coupled to at least the portion of the row conductors and to at least the portion of the column conductors in the cross-point memory array, the sense unit to sense one or more currents flowing through at least one of the row conductors or the column conductors, the one or more currents indicative of stored data in the first memory cell.