Apparatus and method for controlling memory device

An apparatus for controlling a memory device, comprising:

• a table storing information of a plurality of read voltages;
• a voltage supply generating the plurality of read voltages;
• an error correction unit correcting an error of read data;
• and
• a processor functionally coupled to the table and the error correction unit to perform a read retry operation,
• wherein the processor is configured to select a default read voltage among the plurality of read voltages from the table when a read fail for the memory device is recognized, use the default read voltage to read cells of the memory device, set a shift direction of the default read voltage based on a count of read cells for determining a next read voltage in the table, and use the next read voltage to read the cells of the memory device for the read retry operation.