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US 10,311,832 B2Granted
System-on-chip (SoC) devices, display drivers and SoC systems including the same
AssigneeSamaung Electronics Co., Ltd.
InventorsJong-Hyup Lee, Kyoung-Man Kim
Life of this patent
Estimating the term…
Abstract
A system-on-chip (SoC) device includes: a display controller configured to receive a trigger signal, and to output image data based on the trigger signal; and a transceiver configured to receive a first interrupt. In a first mode, the display controller is configured to output the image data in synchronization with a pulse of the trigger signal. In a second mode, which is different from the first mode, the display controller is configured to output the image data in synchronization with a pulse included in the trigger signal only after receiving the first interrupt.
Claims18
A system-on-chip (SoC) system comprising:
- a SoC device configured to receive a trigger signal and a first interrupt signal, and to output image data based on the trigger signal and the first interrupt signal, wherein
- in a first mode, the SoC device is configured to transmit first image data in synchronization with a pulse of the trigger signal,
- in a second mode, the SoC device is configured to transmit second image data in synchronization with a pulse of the trigger signal only after receiving the first interrupt signal, and
- the trigger signal and the first interrupt signal are synchronized with each other;
- and
- a display configured to transmit the trigger signal and the first interrupt signal to the SoC device, and to output the first image data and the second image data in the first mode and the second mode, respectively, wherein
- the display is configured to transmit the first interrupt signal to the SoC device only in the second mode.
4 more elements
A system-on-chip (SoC) system comprising:
- a SoC device configured to
- receive a trigger signal including successive first and second pulses,
- transmit first still image data in synchronization with the first pulse, and
- transmit second still image data in synchronization with the second pulse;
- and
- a display configured to
- transmit the trigger signal to the SoC device,
- receive the first still image data and the second still image data from the SoC device,
- output the first still image data in synchronization with the first pulse,
- output the second still image data in synchronization with the second pulse,
- generate a first interrupt signal in response to determining that the first still image data and the second still image data are identical, and
- transmit the first interrupt signal to the SoC device,
- wherein the SoC device is further configured to
- wait until the first interrupt signal is received, and
- transmit the second still image data to the display in response to receiving the first interrupt signal from the display, and
- wherein the trigger signal and the first interrupt signal are synchronized with each other.
13 more elements
A system-on-chip (SoC) system comprising:
- a SoC device configured to
- receive a trigger signal including successive first and second pulses,
- transmit first still image data in synchronization with the first pulse, and
- transmit second still image data in synchronization with the second pulse;
- and
- a display configured to
- transmit the trigger signal to the SoC device,
- receive the first still image data and the second still image data from the SoC device,
- output the first still image data in synchronization with the first pulse,
- output the second still image data in synchronization with the second pulse,
- generate a first interrupt signal in response to determining that the first still image data and the second still image data are identical, and
- transmit the first interrupt signal to the SoC device,
- wherein the SoC device is further configured to
- wait until the first interrupt signal is received, and
- transmit the second still image data to the display in response to receiving the first interrupt signal from the display,
- wherein the trigger signal includes third to fifth pulses that are continuous with the first and second pulses, and
- the SoC device is further configured to receive the first interrupt signal from the display in synchronization with the fourth pulse.
14 more elements
Dependencies are inferred from the claim text.