Pixel driver circuit and driving method thereof

A pixel driver circuit, which comprises:

• a first thin film transistor (TFT), having a gate connected to a first node, a source and a drain connected respectively to a high voltage power source and a second node;
• a second TFT, having a gate connected to a first control signal, a source and a drain connected respectively to the first node and the second node;
• a third TFT, having a gate connected to a second control signal, a source and a drain connected respectively to the second node and an anode of an organic light-emitting diode (OLED),
• the OLED, having a cathode connected to a low voltage power source;
• a fourth TFT, having a gate connected to the first control signal, a source and a drain connected respectively to a third node and a reference voltage;
• a fifth TFT, having a gate connected to the first control signal, a source and a drain connected respectively to the third node and a data signal;
• a sixth TFT, having a gate connected to a third control signal, a source and a drain connected respectively to the third node and the first node;
• a first capacitor, having two ends connected respectively to the first node and the high voltage power source;
• and
• a second capacitor, having two ends connected respectively to the first node and the third node;
• wherein the reference voltage having a voltage level less than the data signal;
• wherein the first TFT, the second TFT, the third TFT, the fifth TFT, and the sixth TFT being P-type TFTs, and the fourth TFT being an N-type TFT;
• wherein the first control signal, the second control signal, and the third control signal being configured for an initialization phase, a threshold voltage detection phase, and a light-emitting phase;
• wherein in the initialization phase, the first control signal keeping at high voltage, the second control signal keeping at high voltage, and the third control signal keeping at low voltage;
• wherein in the threshold voltage detection phase, the first control signal keeping at low voltage, the second control signal keeping at high voltage, and the third control signal keeping at high voltage.