Method and apparatus for performing symbolic timing analysis with spatial variation

A non-transitory computer readable medium including a sequence of instructions stored thereon for causing a computer to execute a method for designing a system on a target device, comprising:

• placing the system on the target device;
• performing timing analysis on the placed system to model delays by using a plurality of localized functions that overlap to represent an influence that affects a delay for an area on the target device that is a proper subset of a total area of the target device, wherein each of the plurality of localized functions cover less than a total area of the target device;
• generating a program file that includes a design of the system that is placed and timing analyzed;
• and
• programming the target device with the program file to transform programmable resources on the target device to implement the design, wherein the target device is implemented on an integrated circuit.

A system designer, comprising:

• a placement unit that places a system on a target device;
• a timing analysis unit that performs timing analysis to model delay on the system that is placed by using a plurality of localized functions that overlap to represent an influence that affects a delay for an area on the target device that is a proper subset of a total area of the target device, wherein each of the plurality of localized functions cover less than a total area of the target device, and wherein at least one of the placement unit and the timing analysis unit is implemented by a processor;
• and
• an assembly unit that generates a data file that includes a design of the system that is placed and timing analyzed and programs the target device with the data file to transform programmable resources on the target device to implement the design, wherein the target device is implemented on an integrated circuit.