Circuit design method and simulation method based on random telegraph signal noise

A circuit design method, executed by a computer, comprising:

• receiving, from a memory device, a first netlist and a first device model library in which random telegraph signal (RTS) noise is not reflected;
• determining RTS noise information corresponding to each of a plurality of transistors included in the first netlist;
• generating an RTS model corresponding to each of the transistors, based on a result of the determination of the RTS noise information, wherein the RTS model comprises a current source connected electrically in series between a source and a drain of each of the transistors;
• outputting a second netlist and a second device model library in which the RTS noise is reflected, based on the RTS model;
• and
• simulating an operation of the transistors using the second netlist to determine whether the simulated operation of the transistors comports with predetermined operational characteristics.

A simulation method, executed by a computer, comprising:

• receiving a first netlist describing a plurality of transistors;
• performing, by using the first netlist, a first simulation in which random telegraph signal (RTS) noise is not reflected;
• generating RTS noise information corresponding to each of the transistors, based on a result of the first simulation;
• generating an RTS model corresponding to each of the transistors, based on the RTS noise information, wherein the RTS model comprises a current source connected electrically in series between a source and a drain of each of the transistors;
• and
• performing, by using a second netlist describing the transistors, a second simulation in which RTS noise is reflected to determine whether a simulated operation of the transistors comports with predetermined operational characteristics, based on a result of the generation of the RTS model.