Method and peripheral module for transmitting highway addressable remote transducer (HART) variables and CPU unit for reading the HART variables

A peripheral module which connects to Highway Addressable Remote Transducer (HART) field devices and which transmits different HART variables from at least one HART field device to a central processing unit (CPU) of a programmable logic controller, the at least one HART field device and the programmable logic controller being connected via buses to the peripheral module, and the peripheral module including an address space with an input area for data to be read by the CPU and an output area for data to be written by the CPU, comprising:

• an address space having an input area and an output area and being configured to provide the HART variables in the input area of the address space for cyclic reading by the CPU of the programmable logic controller and to update them continuously;
• and
• a communication area for transmitting an individual HART variable provided in the input and output area of the address space;
• wherein the peripheral module is further configured to receive in the output area of the communication area a command of the CPU of the programmable logic controller specifying the HART variable currently to be read and to provide and continuously update each HART variable specified in the input area of the communication area until a time at which a new command which specifies another HART variable to be read, in the output area is received.

A central processor unit (CPU) of a programmable logic controller, configured to read Highway Addressable Remote Transducer (HART) variables of at least one HART field device via a peripheral module, the at least one HART field device and the programmable logic controller being connected via buses to the peripheral module, and the peripheral module including an address space with an input area for data to be read by the CPU and an output area for data to be written by the CPU, the CPU comprising:

• at least one channel block which represents a predetermined number of different HART variables and a corresponding number of inputs and outputs;
• wherein the HART variables are predetermined as input parameters and are processed sequentially by the channel block;
• and
• wherein each current value of a corresponding HART variable is cyclically read from a communication area of the peripheral module concerned and is provided at an output until a next read.