Facilitating recording a trace file of code execution using a processor cache

A computing device for facilitating recording a trace of code execution using a processor cache, the computing device comprising:

• a plurality of processing units;
• the processor cache, which is shared by the plurality of processing units and which is configured to cache data from a memory device, the processor cache including:
• a plurality of cache lines that each comprise at least (i) an address portion for storing a memory address of the memory device, and (ii) a value portion for storing a value associated with the memory address;
• and
• a set of accounting bits that include different pluralities of accounting bits, each plurality of accounting bits being associated with a different cache line and including a different unit bit associated with a different one of the plurality of processing units;
• and stored control logic that is configured to:
• use the pluralities of accounting bits to indicate, for each cache line and for each processing unit, whether or not a trace file logs for the processing unit a current value stored in the value portion of the cache line;
• and
• detect a write operation by a particular processing unit on a particular cache line, and as a result of the write operation, clear each unit bit in the plurality of accounting bits associated with the cache line, except for the particular unit bit associated with the particular processing unit.