Facilitating recording a trace file of code execution using index bits in a processor cache

A computing device for facilitating recording a trace of code execution using a processor cache, the computing device comprising:

• a plurality of processing units;
• the processor cache, which is shared by the plurality of processing units and which is configured to cache data from a memory device, the processor cache including:
• a plurality of cache lines that each comprise at least (i) an address portion for storing a memory address of the memory device, and (ii) a value portion for storing a value associated with the memory address;
• and
• different pluralities of accounting bits, each plurality of accounting bits being associated with a different cache line of the plurality of cache lines;
• and
• stored control logic that is configured to use the different pluralities of accounting bits to indicate, for each cache line at least one of:
• an index to one of the plurality of processing units for which a trace file logs a current value stored in the value portion of the cache line;
• or
• an indicator that the trace file does not log the value portion of the cache line for any processing unit.