Memory control method and memory control apparatus

A control apparatus of a memory including a targeted memory zone having a plurality of memory cells, a storage capacity of each memory cell being one page, the apparatus comprising:

• a first acquisition unit, configured to receive a to-be-stored data and obtain a targeted address of the to-be-stored data;
• a read out unit, configured to read out data status of each of the plurality of memory cells of the target memory zone, the data status of the each of the plurality of memory cells of the targeted memory zone being one of an erased state, an indefinite state, and an active state;
• a programming unit, configured to perform a programming operation to a memory cell with the erased status and write the to-be-stored data to the memory cell with the erased status;
• an erasing unit, configured to perform an erasing operation to prepare for a next data writing operation after writing the to-be-stored data into the memory cell with the erased status;
• a second acquisition unit, configured to obtain the identification information of each segment of the to-be-stored data respectively when two memory cells are at the valid state and have a same logic address;
• and
• a second determining unit, configured to determine serial numbers of the two memory cells.

A control apparatus of a memory including a targeted memory zone having a plurality of memory cells, a storage capacity of each memory cell being one page, the apparatus comprising:

• a first acquisition unit, configured to receive a to-be-stored data and obtain a targeted address of the to-be-stored data;
• a read out unit, configured to read out data status of all memory cells of the target memory zone;
• a programming unit, configured to perform a programming operation to a memory cell with an erased status and write the to-be-stored data to the memory cell with the erased status;
• and
• an erasing unit, configured to perform an erasing operation to prepare for a next data writing operation after writing the to-be-stored data into the memory cell with the erased status, wherein:
• the erasing unit is also configured to perform an erasing operation to a memory cell having a larger serial number when the memory cell and another memory cell are both at the valid state and have a same logic address.