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US 10,310,764 B2Granted
Semiconductor memory device and storage apparatus comprising semiconductor memory device
AssigneeHitachi, Ltd.
InventorsAkifumi Suzuki, Mitsuhiro Okada, Satoshi Morishita
Life of this patent
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Abstract
The semiconductor memory device comprises a memory element group (one or more semiconductor memory elements) and a memory controller. The memory controller comprises a processor configured to process at least a part of an I/O command from a higher-level apparatus when the part of the I/O command satisfies a predetermined condition, and one or more hardware logic circuits configured to process the entire I/O command when the I/O command does not satisfy the predetermined condition.
Claims13
A semiconductor memory device, comprising:
- a memory controller including a processor configured to process at least a part of an I/O (Input/Output) command from a higher-level apparatus when the part of the I/O command satisfies a predetermined condition, and one or more hardware logic circuits, which are different from the processor, and are configured to process the entire I/O command when the I/O command does not satisfy the predetermined condition;
- and
- a memory element group that is one or more semiconductor memory elements configured to store data input and output by the memory controller, the data being at least a part of I/O target data associated with the I/O command,
- wherein the memory controller comprises a temporary memory area, and
- wherein the predetermined condition is satisfied when at least a part of the I/O target data is stored in the temporary memory area.
2 more elements
A storage apparatus, comprising:
- a plurality of semiconductor memory devices;
- and
- a storage controller configured to transmit an I/O command to at least one of the plurality of semiconductor memory devices, based on an I/O request issued by a host computer,
- the at least one of the plurality of the semiconductor memory devices comprising:
- a memory controller including a processor configured to process at least a part of the I/O command from the storage controller when the part of the I/O command satisfies a predetermined condition, and one or more hardware logic circuits, which are different from the processor, and are configured to process the entire I/O command when the I/O command does not satisfy the predetermined condition;
- and
- a memory element group that is one or more semiconductor memory elements configured to store data input and output by the memory controller, the data being at least a part of I/O target data associated with the I/O command,
- wherein the memory controller comprises a temporary memory area, and
- wherein the predetermined condition is satisfied when at least a part of the I/O target data is stored in the temporary memory area.
6 more elements
Dependencies are inferred from the claim text.