Memory system having a semiconductor memory device with protected blocks

A method of protecting a block of memory cells in a semiconductor memory cell array with a controller circuit that is configured to communicate with a host apparatus through an interface conforming to Serial Peripheral Interface (SPI), the method comprising:

• upon receiving a first command, which is a block protection enable command, from the host apparatus through the interface, enabling execution of a second command, which is a block protection command to register a block among the plurality of blocks that is designated in the second command as a protected block;
• after receiving the second command from the host apparatus through the interface, following the first command, determining whether or not the block designated in the second command is eligible for protection,
• when the block designated in the second command is determined to be eligible for protection, executing the second command to register the block designated in the second command as a protected block;
• and
• upon receiving a third command to erase the protected block or write to the protected block from the host apparatus through the interface, transmitting a notification indicating a failure to execute the third command to the host apparatus, without performing an erase operation or a write operation requested by the third command,
• wherein the semiconductor memory cell array is implemented in a first semiconductor chip without the controller circuit, and the controller circuit is implemented in a second semiconductor chip without the semiconductor memory cell array, and the second semiconductor chip is stacked on the first semiconductor chip.