Memory management method, memory control circuit unit and memory storage device

A memory control circuit unit, configured to control a re writable non-volatile memory module, wherein the memory control circuit unit comprises:

• a host interface, configured to be connected to a host system;
• a memory interface, configured to be connected to the rewritable non-volatile memory module having a plurality of physical erasing units;
• and
• a memory management circuit, connected to the host interface and the memory interface,
• wherein the memory management circuit is configured to receive a write command from the host system,
• wherein the memory management circuit is further configured to obtain a valid data parameter based on a valid data amount of valid data stored in at least a part of the physical erasing units,
• wherein the memory management circuit is further configured to obtain a first threshold value and a second threshold value based on the valid data parameter,
• wherein the memory management circuit is further configured to obtain a first determination parameter based on a number of a plurality of first physical erasing units among the physical erasing units, wherein the first physical erasing units are programmed for storing data by using a single-page programming mode, and each memory cell of a physical erasing unit programmed by using the single-page programming mode stores one data bit,
• wherein the memory management circuit is further configured to perform a garbage collection operation if the first determination parameter is greater than the first threshold value,
• wherein the memory management circuit is further configured to obtain a second determination parameter based on a number of a plurality of second physical erasing units among the physical erasing units, wherein the second physical erasing units are not to be stored data,
• wherein the memory management circuit is further configured to program data corresponding to the write command into a third physical erasing unit among the second physical erasing units by using a multi-page programming mode if the second determination parameter is less than the second threshold value, wherein each memory cell of a physical erasing unit programmed by using the multi-page programming mode stores a plurality of data bits.

A memory storage device, comprising:

• a connection interface unit, configured to be connected to a host system;
• a rewritable non-volatile memory module, having a plurality of physical erasing units;
• and
• a memory control circuit unit, connected to the connection interface unit and the rewritable non-volatile memory module,
• wherein the memory control circuit unit is configured to receive a write command from the host system,
• wherein the memory control circuit unit is further configured to obtain a valid data parameter based on a valid data amount of valid data stored in at least a part of the physical erasing units,
• wherein the memory control circuit unit is further configured to obtain a first threshold value and a second threshold value based on the valid data parameter,
• wherein the memory control circuit unit is further configured to obtain a first determination parameter based on a number of a plurality of first physical erasing units among the physical erasing units, wherein the first physical erasing units are programmed for storing data by using a single-page programming mode, and each memory cell of a physical erasing unit programmed by using the single-page programming mode stores one data bit,
• wherein the memory control circuit unit is further configured to perform a garbage collection operation if the first determination parameter is greater than the first threshold value,
• wherein the memory control circuit unit is further configured to obtain a second determination parameter based on a number of a plurality of second physical erasing units among the physical erasing units, wherein the second physical erasing units are not to be stored data,
• wherein the memory control circuit unit is further configured to program data corresponding to the write command into a third physical erasing unit among the second physical erasing units by using a multi-page programming mode if the second determination parameter is less than the second threshold value, wherein each memory cell of a physical erasing unit programmed by using the multi-page programming mode stores a plurality of data bits.