Thermal management for photonic integrated circuits

A layered photonic integrated circuit comprising:

• a silicon layer having a top side that defines a plane extending in a lateral direction;
• a first waveguide positioned on the top side of the silicon layer;
• a first region positioned on a bottom side of the silicon layer and laterally aligned with the first waveguide, the first region having a first thermal conductivity;
• a second waveguide positioned on the top side of the silicon layer and laterally offset from the first waveguide;
• a second region positioned on the bottom side of the silicon layer and laterally aligned with the second waveguide, the second region having a second thermal conductivity different from the first thermal conductivity;
• and
• a silicon substrate positioned on a bottom side of the first region and a bottom side of the second region.

A layered photonic integrated circuit, comprising:

• a silicon layer having a top side that defines a plane extending in a lateral direction;
• a passive optical device positioned on the top side of the silicon layer;
• a buried oxide layer positioned on a bottom side of the silicon layer and laterally aligned with the passive optical device, the buried oxide layer having a first thermal conductivity;
• an active optical device positioned on the top side of the silicon layer and laterally offset from the passive optical device;
• and
• a diamond layer positioned on the bottom side of the silicon layer and laterally aligned with the active optical device, the diamond layer having a second thermal conductivity greater than the first thermal conductivity.

A method of manufacturing a layered photonic integrated circuit, the method comprising:

• forming a silicon layer having a top side that defines a plane extending in a lateral direction;
• forming a first waveguide positioned on the top side of the silicon layer;
• forming a first region positioned on a bottom side of the silicon layer and laterally aligned with the first waveguide, the first region having a first thermal conductivity, the first region being a buried oxide layer;
• forming a second waveguide positioned on the top side of the silicon layer and laterally offset from the first waveguide;
• and
• forming a second region positioned on the bottom side of the silicon layer and laterally aligned with the second waveguide, the second region having a second thermal conductivity different from the first thermal conductivity.