Partial decoding circuit of video encoder/decoder for dealing with inverse second transform and partial encoding circuit of video encoder for dealing with second transform

A partial encoding circuit with second transform, comprising:

• a transpose buffer, arranged to store an intermediate residual transform result of the second transform;
• a first-direction residual transform circuit, arranged to process a transform output of a transform circuit to generate the intermediate residual transform result to the transpose buffer;
• a second-direction residual transform circuit, arranged to access the transpose buffer to retrieve the intermediate residual transform result, and process the intermediate residual transform result to generate a final residual transform result of the second transform, wherein the final residual transform result is further processed by a quantization circuit;
• and
• a bypass path, arranged to transmit residual transform data that is not needed to be processed by one or both of the first-direction residual transform circuit and the second-direction residual transform circuit
• wherein the bypass path is coupled between an output of the transform circuit and an input of the quantization circuit, or coupled between the output of the transform circuit and an input of the second-direction inverse residual transform circuit, or coupled between an output of the transpose buffer and the input of the quantization circuit;
• wherein the first-direction residual transform circuit and the second-direction residual transform circuit are arranged to process partial residual transform data of different process units in a parallel processing manner.

A partial decoding circuit with inverse second transform, comprising:

• a transpose buffer, arranged to store an intermediate inverse residual transform result of the inverse second transform;
• a shared inverse residual transform circuit, arranged to employ a same processing kernel to perform a first-direction inverse residual transform operation and a second-direction inverse residual transform operation, wherein the first-direction inverse residual transform operation processes an inverse quantization output of an inverse quantization circuit to generate the intermediate inverse residual transform result to the transpose buffer;
• the second-direction inverse residual transform operation accesses the transpose buffer to retrieve the intermediate inverse residual transform result, and processes the intermediate inverse residual transform result to generate a final inverse residual transform result of the inverse second transform;
• and the final inverse residual transform result is further processed by an inverse transform circuit;
• and
• a bypass path, arranged to transmit residual transform data that is not needed to be processed by the shared inverse residual transform circuit
• wherein the bypass path is coupled between an output of the inverse quantization circuit and an input of the inverse transform circuit.

A partial decoding circuit with inverse second transform, comprising:

• a transpose buffer, arranged to store an intermediate inverse residual transform result of the inverse second transform;
• and
• a shared inverse residual transform circuit, arranged to employ a same processing kernel to perform a first-direction inverse residual transform operation and a second-direction inverse residual transform operation, wherein the first-direction inverse residual transform operation processes an inverse quantization output of an inverse quantization circuit to generate the intermediate inverse residual transform result to the transpose buffer;
• the second-direction inverse residual transform operation accesses the transpose buffer to retrieve the intermediate inverse residual transform result, and processes the intermediate inverse residual transform result to generate a final inverse residual transform result of the inverse second transform;
• and the final inverse residual transform result is further processed by an inverse transform circuit;
• wherein the inverse quantization circuit is part of the partial decoding circuit, the transpose buffer is further used as an inverse residual transform output buffer for storing the final inverse residual transform result of the inverse second transform, and the partial decoding circuit further comprises:
• an inverse quantization output buffer, wherein the inverse quantization circuit generates the inverse quantization output associated with a first portion of residual data in a process unit to the shared inverse residual transform circuit, and further generates another inverse quantization output to the inverse quantization output buffer;
• and
• a multiplexer, arranged to selectively connect the inverse quantization output buffer or the transpose buffer to set a multiplexer output.

A partial encoding circuit with second transform, comprising:

• a transpose buffer, arranged to store an intermediate residual transform result of the second transform;
• a shared residual transform circuit, arranged to employ a same processing kernel to perform a first-direction residual transform operation and a second-direction residual transform operation, wherein the first-direction residual transform operation processes a transform output of a transform circuit to generate the intermediate residual transform result to the transpose buffer, the second-direction residual transform operation accesses the transpose buffer to retrieve the intermediate residual transform result, and processes the intermediate residual transform result to generate a final residual transform result of the second transform, and the final residual transform result is further processed by a quantization circuit;
• and
• a bypass path, arranged to transmit residual transform data that is not needed to be processed by the shared residual transform circuit
• wherein the bypass path is coupled between an output of the transform circuit and an input of the quantization circuit.