Photoelectric conversion apparatus, imaging system, and method for driving photoelectric conversion apparatus
AssigneeCanon Kabushiki Kaisha
InventorsKazuki Ohshitanai, Yasuji Ikeda
Life of this patent
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Abstract
In a photoelectric conversion apparatus, the number of differential transistors in which ON states thereof overlap with one another is increased when the number of the amplification transistors in which ON states thereof overlap with one another is increased.
Claims19
A photoelectric conversion apparatus comprising:
- a plurality of pixels each including a photoelectric conversion unit configured to generate a charge based on an incident light and an amplification transistor having a control node configured to receive the charge and to serve as a first input node of a differential pair;
- and
- a plurality of transistors having respective control nodes configured to receive a common potential,
- wherein an operation of setting the control nodes of the plurality of transistors as a second input node of the differential pair while the plurality of transistors are in ON states and an operation of setting the control node of a part of the plurality of transistors as a second input node while the part of the plurality of transistors is in an ON state, are switched from one to another.
A photoelectric conversion apparatus comprising:
- a plurality of pixels each including a photoelectric conversion unit configured to generate a charge based on incident light, an amplification transistor having a node connected to the photoelectric conversion unit, and a selection transistor;
- a plurality of transistors having respective control nodes configured to receive a common potential;
- a switch;
- and
- a current source,
- wherein the amplification transistor, the selection transistor, the plurality of transistors, the switch, a power source voltage node, and the current source form a differential pair, and the differential pair has a first electric path and a second electric path between the power source voltage node and the current source,
- in the first electric path, the selection transistor is disposed between the current source and the amplification transistor, and
- in the second electric path, the switch is disposed between the current source and one of the plurality of transistors.
A method for driving a photoelectric conversion apparatus including a plurality of pixels each including a photoelectric conversion unit configured to generate a charge and an amplification transistor having a control node configured to receive the charge and to serve as a first input node of a differential pair, and a plurality of transistors having respective control nodes which receive a potential in common, wherein
- in a first operation,
- among the amplification transistors included in the plurality of pixels, at least one amplification transistor, that is, a first number of amplification transistors, is in an ON state for a first period, and
- among the plurality of transistors, at least one transistor, that is, a second number of transistors, is in an ON state for the first period and is set as a second input node of the differential pair, and
- in a second operation,
- among the amplification transistors included in the plurality of pixels, a number of amplification transistors corresponding to a number larger than the first number, that is, a third number of application transistors, are in ON states for a second period, and
- among the plurality of transistors, a number of transistors corresponding to a number larger than the second number, that is, a fourth number of transistors, are in ON states for the second period and are set as the second input node of the differential pair.
A photoelectric conversion apparatus comprising:
- a plurality of pixels each including a photoelectric conversion unit configured to generate a charge based on incident light and an amplification transistor having a control node configured to receive the charge and to serve as a first input node of a differential pair;
- a transistor having a control node serving as a second input node of the differential pair;
- a counter configured to generate and output a count signal obtained by counting a clock signal;
- and
- a memory configured to receive the count signal from the counter,
- wherein the amplification transistors of the plurality of pixels are brought into ON states, and
- digital signals corresponding to the charges of the plurality of pixels are generated in accordance with outputs of the differential pairs,
- wherein a ramp signal ramp is supplied to a control node of the transistor,
- the differential pair outputs, to the memory, a comparison result signal indicating a result of comparison between the ramp signal and signals output from the amplification transistors which are simultaneously in ON states and which are included in the plurality of pixels, and
- the memory stores the count signal when a value of the comparison result signal is changed.
Dependencies are inferred from the claim text.