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US 10,122,524 B2Granted
Timing correction in a communication system
AssigneeTexas Instruments Incorporated
InventorsAnant Shankar Kamath, Divyasree J.
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Abstract
One example includes a communication system. The system includes a data transmitter configured to generate a digital communication signal and a data receiver configured to receive the digital communication signal. The system also includes a pulse-width distortion (PWD) correction circuit arranged between the data transmitter and the data receiver and being configured to adjust at least one timing parameter associated with the communication signal.
Claims6
A pulse-width distortion (PWD) correction circuit comprising at least one edge-delay circuit, each of the at least one edge-delay circuit comprising:
- a buffer configured to generate a buffered digital communication signal based on a digital communication signal, the buffer comprising an inverter stage configured to invert the digital communication signal;
- a filter configured to generate an average voltage corresponding to an average amplitude of the buffered digital communication signal;
- and
- an error amplifier configured to compare the average voltage with a predetermined reference voltage to generate a comparison signal that controls the inverter stage of the buffer in a negative feedback arrangement.
1 more element
Dependencies are inferred from the claim text.