Digital signal processing device and optical transceiver apparatus

An optical transceiver apparatus comprising:

• a frame processing section including first and second ports;
• first and second digital signal processing sections receiving signals from the frame processing section to perform digital signal processing on the signals, or outputting signals subjected to the digital signal processing, to the frame processing section;
• and
• first and second optical transceivers receiving and converting an optical signal into electric signals and providing the electric signals to the first and second digital signal processing sections respectively, or converting electric signals respectively received from the first and second digital signal processing sections, into an optical signal, and transmitting the optical signal,
• wherein the first digital signal processing section includes a first signal processing section and first and second input/output interface sections;
• and
• the second digital signal processing section includes a second signal processing section, third and fourth input/output interface sections, and a selection section,
• the first and second signal processing sections selectively switch modulation/demodulation in low-efficiency modulation system and modulation/demodulation in high-efficiency modulation system which transmits and receives an optical signal at a bit rate that is plural times of a bit rate of the low-efficiency modulation system, and perform digital signal processing,
• the first, second, third, and fourth input/output interface sections mutually convert serial signals and parallel signals,
• parallel-side interfaces of the first and second input/output interface sections are electrically connected to the first signal processing section,
• serial-side interfaces of first and third input/output interface sections are electrically connected to the first and second ports of the frame processing section respectively,
• a serial-side interface of the second input/output interface section is electrically connected to a serial-side interface of the fourth input/output interface section,
• the selection section electrically connects a parallel-side interface of the third input/output interface section to the second signal processing section when the low-efficiency modulation system is selected, and
• the selection section electrically connects the parallel-side interface of the third input/output interface section to a parallel-side interface of the fourth input/output interface section when the high-efficiency modulation system is selected.