High voltage transistor structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKer Hsiao Huo, Chih-Chang Cheng, Ru-Yi Su, Jen-Hao Yeh, Fu-Chih Yang, Chun Lin Tsai
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsKer Hsiao Huo, Chih-Chang Cheng, Ru-Yi Su, Jen-Hao Yeh, Fu-Chih Yang, Chun Lin Tsai
Estimating the term…
An embodiment of a structure provides an enhanced performing high voltage device, configured as a lateral diffused MOS (HV LDMOS) formed in a tri-well structure (a small n-well in an extended p-type well inside an n-type well) within the substrate with an anti-punch through layer and a buried layer below the n-type well, which reduces substrate leakage current to almost zero. The drain region is separated into two regions, one within the small n-well and one contacting the outer n-type well such that the substrate is available for electric potential lines during when a high drain voltage is applied.
A high voltage semiconductor transistor, comprising:
A transistor, comprising:
A transistor, comprising:
Dependencies are inferred from the claim text.