High voltage semiconductor device

A high voltage semiconductor device, comprising:

• a P type substrate;
• a high voltage N type well formed in the P type substrate;
• a first P type well formed in the high voltage N type well, a bottom of the first P type well being separated from a surface of the P type substrate by a first depth;
• a N type heavily doping region and a P type heavily doping region formed in the P type substrate, wherein the N type heavily doping region is formed in the first P type well;
• a field oxide formed on the P type substrate and located between the N type heavily doping region and the P type heavily doping region;
• a drift region formed in the high voltage N type well, wherein the drift region extends down from the surface of the P type substrate, located under the field oxide and between the N type heavily doping region and the P type heavily doping region;
• and
• a P type doping layer formed in the P type substrate, a bottom of the P type doping layer being separated from the surface of the P type substrate by a second depth, wherein the second depth is larger than the first depth, the P type doping layer is formed in a region located below the first P type well and the drift region, the P type doping layer is fully located under a middle region between the first P type well and the drift region, and the P type doping layer is separated from the first P type well which comprises the N type heavily doping region.

A high voltage semiconductor device, comprising:

• a P type substrate;
• a high voltage N type well formed in the P type substrate;
• a first P type well formed in the high voltage N type well, a bottom of the first P type well being separated from a surface of the P type substrate by a first depth;
• a source region and a drain region formed in the P type substrate, the source region is an N type heavily doping region and formed in the first P type well;
• a field oxide formed on the P type substrate and located between the source region and the drain region;
• a drift region formed in the high voltage N type well, wherein the drift region extends down from the surface of the P type substrate, located under the field oxide and between the source region and the drain region;
• a gate structure formed above the high voltage N type well, wherein the source region is electrically connected to the gate structure;
• and
• a P type doping layer formed in the P type substrate, a bottom of the P type doping layer being separated from the surface of the P type substrate by a second depth, wherein the second depth is larger than the first depth, the P type doping layer is formed in a region located below the first P type well and the drift region, the P type doping layer is fully located under a middle region between the first P type well and the drift region, and the P type doping layer is separated from the first P type well which comprises the source region.