Semiconductor device structure with strain-relaxed buffer

A semiconductor device structure, comprising:

• a first transistor over a semiconductor substrate, wherein the first transistor comprises:
• first semiconductor wires having a first lattice constant;
• a first gate stack surrounding the first semiconductor wires;
• first spacer elements over the first semiconductor wires and on opposite sides of the first gate stack;
• second spacer elements between the first semiconductor wires;
• and
• first composite source or drain regions on opposite sides of the first semiconductor wires, wherein the first composite source or drain regions comprise a first buffer structure and a first source or drain structure covering the first buffer structure, and wherein the first buffer structure has a second lattice constant that is different from the first lattice constant;
• and
• a second semiconductor wire between the first semiconductor wires, wherein the second semiconductor wire is separated from the first source or drain region structure.

A semiconductor device structure, comprising:

• a fin structure over a semiconductor substrate;
• a source or drain structure over the fin structure;
• a strain-relaxed buffer structure between the source or drain structure and the fin structure;
• an isolation feature over the semiconductor substrate and below the source or drain structure, wherein the isolation feature surrounds the fin structure and the strain-relaxed buffer structure;
• a dielectric layer covering the isolation feature and surrounding the source or drain structure;
• and
• an isolation liner between the isolation feature and the fin structure, wherein the isolation liner further extends between the isolation feature and the strain-relaxed buffer structure.