Switching device and method of manufacturing the same

A switching device comprising:

• a semiconductor substrate;
• a first trench provided in an upper surface of the semiconductor substrate;
• a second trench provided in the upper surface of the semiconductor substrate and disposed at an interval from the first trench;
• gate insulating layers each of which covers an inner surface of a corresponding one of the first and second trenches;
• and
• gate electrodes each of which is disposed in a corresponding one of the first and second trenches and is insulated from the semiconductor substrate by a corresponding one of the gate insulating layers,
• wherein the semiconductor substrate includes
• a first semiconductor region of a first conductivity type disposed between the first and second trenches and facing the gate electrodes in the first and second trenches via the gate insulating layers,
• a body region of a second conductivity type contacting the first semiconductor region from a lower side and facing the gate electrodes in the first and second trenches via the gate insulating layers,
• a second semiconductor region of the first conductivity type contacting the body region from the lower side, the second semiconductor region being separated from the first semiconductor region by the body region, and the second semiconductor region facing the gate electrodes in the first and second trenches via the gate insulating layers,
• a first bottom semiconductor region of the second conductivity type disposed in an area extending to a bottom surface of the first trench, the first bottom semiconductor region contacting the second semiconductor region,
• a second bottom semiconductor region of the second conductivity type disposed in an area extending to a bottom surface of the second trench, the second bottom semiconductor region contacting the second semiconductor region, and
• a connection semiconductor region of the second conductivity type provided at a part of an area under the body region, the connection semiconductor region including a portion extending from the first trench to reach the second trench in a depth range from a depth of a lower end of the body region to a depth of the bottom surfaces of the first and second trenches, the portion of the connection semiconductor region contacting the second semiconductor region, and the portion of the connection semiconductor region being connected to the body region, the first bottom semiconductor region, and the second bottom semiconductor region,
• wherein the first and second trenches extend to cross the connection semiconductor region when viewed from the upper surface of the semiconductor substrate.