US 10,121,811 B1 · Method of high-aspect ratio pattern formation with submicron pixel pitch

Abstract

Implementations of the disclosure provide a method of fabricating an image sensor device. The method includes forming first trenches in a first photoresist layer using a first photomask having a first pattern to expose a first surface of a substrate, directing ions into the exposed first substrate through the first trenches to form first isolation regions in the substrate, removing the first photoresist layer, forming second trenches in a second photoresist layer using a second photomask having a second pattern to expose a second surface of the substrate, the second pattern being shifted diagonally from the first pattern by half mask pitch, directing ions into the exposed second surface through the second trenches to form second isolation regions in the substrate, the first and second isolation regions being alternatingly disposed in the substrate, and the first and second isolation regions defining pixel regions therebetween, and removing the second photoresist layer.

Claims20

Dependent claims

A method of fabricating a semiconductor device, comprising:

forming a plurality of first trenches in a first photoresist layer using a first photomask having a first pattern to expose a first surface of a substrate disposed below the first photoresist layer;
directing ions into the exposed first substrate of the substrate through the plurality of the first trenches to form a plurality of first isolation regions in the substrate;
removing the first photoresist layer;
forming a plurality of second trenches in a second photoresist layer using a second photomask having a second pattern to expose a second surface of the substrate, the second pattern being shifted diagonally from the first pattern by half mask pitch;
directing ions into the exposed second surface of the substrate through the plurality of the second trenches to form a plurality of second isolation regions in the substrate, the first isolation regions and the second isolation regions being alternatingly disposed in the substrate, and the first isolation regions and the second isolation regions defining a plurality of pixel regions therebetween;
and
removing the second photoresist layer.

4 more elements

A method of fabricating a semiconductor device, comprising:

forming first photoresist columns on a first surface of a substrate by using a first photomask having a first pattern, the first photoresist columns being separated from each other by a first trench, wherein an aspect ratio of the first photoresist columns is lower than an aspect ratio of the first trench;
exposing the first photoresist columns to a chemical shrinking process to shrink the first trench;
performing a first ion implantation process using the first photoresist columns as a mask to form first isolation regions in the substrate;
removing the first photoresist columns;
forming second photoresist columns on the first surface of the substrate by using a second photomask having a second pattern, the second photoresist columns being separated from each other by a second trench, wherein an aspect ratio of the second photoresist columns is lower than an aspect ratio of the second trench, and the second pattern being offset from the first pattern;
exposing the second photoresist columns to the chemical shrinking process to shrink the second trench;
performing a second ion implantation process using the second photoresist columns as a mask to form second isolation regions in the substrate, the first isolation regions and the second isolation regions being alternatingly disposed in the substrate, and the first isolation regions and the second isolation regions defining a plurality of pixel regions therebetween;
removing the second photoresist columns;
and
forming one or more pixels in a pixel region.

7 more elements

Dependencies are inferred from the claim text.

Method of high-aspect ratio pattern formation with submicron pixel pitch

Life of this patent

Method of high-aspect ratio pattern formation with submicron pixel pitch

Life of this patent

Abstract

Claims20