Back to results
US 10,121,776 B2Granted
Film-type semiconductor packages and display devices having the same
AssigneeSamsung Electronics Co., Ltd.
InventorsSung-Jun Song, Young-Min Kim, Chang-Su Kim, Han-Gu Kim
Life of this patent
Estimating the term…
Abstract
A film-type semiconductor package includes a semiconductor integrated circuit and a dummy metal pattern. The semiconductor integrated circuit is formed on a film and includes an electrostatic discharge (ESD) protection circuit. The dummy metal pattern is formed on the film and is electrically connected to the ESD protection circuit through a first wiring formed on the film.
Claims19
A film-type semiconductor package, comprising:
- a semiconductor integrated circuit formed on a film, the semiconductor integrated circuit comprising a plurality of pads and an electrostatic discharge (ESD) protection circuit;
- and
- a dummy metal pattern formed on the film, wherein the dummy metal pattern is electrically connected to the ESD protection circuit through a first wiring formed on the film,
- wherein the ESD protection circuit is coupled between a first pad and a second pad among the plurality of pads, and
- the dummy metal pattern is electrically connected to at least one of the first pad and the second pad through the first wiring.
2 more elements
A film-type display driver integrated circuit package, comprising:
- a display driver integrated circuit formed on a film, the display driver integrated circuit comprising a first pad, a second pad, a display driver circuit coupled between the first pad and the second pad, and an electrostatic discharge (ESD) protection circuit coupled between the first pad and the second pad;
- and
- a dummy metal pattern formed on the film, wherein the dummy metal pattern is electrically connected to at least one of the first pad and the second pad through a first wiring formed on the film.
A film-type semiconductor package, comprising:
- a semiconductor integrated circuit formed on a film, the semiconductor integrated circuit comprising a first electrostatic discharge (ESD) protection circuit, a first pad, and a second pad;
- a dummy metal pattern formed on the film, wherein the dummy metal pattern is electrically connected to the first ESD protection circuit through a first wiring formed on the film,
- wherein the first ESD protection circuit comprises:
- a semiconductor substrate;
- an n-type well formed in the semiconductor substrate;
- a p-type well formed in the semiconductor substrate, wherein the p-type well contacts the n-type well;
- a first impurity region formed in the n-type well;
- a second impurity region formed in the n-type well;
- a third impurity region formed in the p-type well;
- a fourth impurity region formed in the p-type well;
- a fifth impurity region formed in the p-type well;
- a sixth impurity region formed at a boundary region between the n-type well and the p-type well;
- and
- a gate,
- wherein the first impurity region and the fourth impurity region are n-type,
- the second impurity region, the third impurity region, the fifth impurity region, and the sixth impurity region are p-type,
- the first impurity region, the second impurity region, and the gate are connected to the first pad, and
- the third impurity region and the fourth impurity region are connected to the second pad.
15 more elements
Dependencies are inferred from the claim text.