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US 10,121,755 B1Granted
Robust chamfer design for seal ring
AssigneeGlobalfoundries Singapore Pte. Ltd.
InventorsMahesh Bhatkar, Juan Boon Tan, Wanbing Yi
Life of this patent
Estimating the term…
Abstract
A seal ring structure is disclosed for integrated circuit (IC) packaging. The seal ring includes an inner moisture barrier ring and an outer crack stop ring. Line structures of both the inner and outer rings include chamfered corners. The chamfers of a chamfered corner are devoid of acute angles. No metal line structure for the inner ring is provided at the pad level. The seal ring as described improves the reliability and strength of the structure and hence the seal ring can sustain high stress at the corners of the die during dicing.
Claims20
A semiconductor device comprising:
- a substrate, the substrate includes
- a prime region having circuit components,
- a seal ring region surrounding the prime region, and
- a kerf region;
- a back-end-of-line (BEOL) dielectric disposed on the substrate covering the prime region with the circuit components, the seal ring region and the kerf region, the BEOL dielectric includes
- a plurality of interlevel dielectric (ILD) levels, an ILD level of the ILD levels includes
- a via dielectric level with via contacts,
- a metal dielectric level with metal lines,
- the metal lines and the via contacts of the ILD levels interconnect the circuit components of the prime region, and
- wherein
- a bottom ILD level is a first ILD level of the BEOL dielectric,
- one or more intermediate ILD levels is disposed above the bottom ILD level, and
- a top ILD level is disposed above the intermediate ILD levels, wherein a top metal level of the top ILD level serves as a pad level with pads;
- and
- a seal ring disposed in the BEOL dielectric over the seal ring region of the substrate, the seal ring comprises an inner moisture oxygen barrier (MOB) ring adjacent to the prime region and an outer crack stop (CS) ring adjacent to the kerf region, wherein
- the MOB ring includes
- MOB metal level metal line structures disposed in metal dielectric levels of the ILD levels except the top metal dielectric level,
- MOB via level metal line structures disposed in via dielectric levels of the ILD levels, and
- the MOB metal level metal line structures and the MOB via level metal line structures include MOB chamfered corners which are devoid of acute angles, and
- the CS ring includes
- CS metal level metal line structures disposed in metal dielectric levels of the ILD levels,
- CS via level metal line structures disposed in via dielectric levels of the ILD levels, and
- the CS metal level metal line structures and the CS via level metal line structures include CS chamfered corners which are devoid of acute angles.
20 more elements
A method of forming a semiconductor device comprising:
- providing a substrate, the substrate is prepared with
- a prime region having circuit components,
- a seal ring region surrounding the prime region, and
- a kerf region;
- forming a back-end-of-line (BEOL) dielectric disposed the substrate covering the sprime region with the circuit components, the seal ring region and the kerf region, the BEOL dielectric includes
- a plurality of interlevel dielectric (ILD) levels, an ILD level of the ILD levels includes
- a via dielectric level with via contacts,
- a metal dielectric level with metal lines,
- the metal lines and the via contacts of the ILD levels interconnect the circuit components of the prime region, and
- wherein
- a bottom ILD level is a first ILD level of the BEOL dielectric,
- one or more intermediate ILD levels is disposed above the bottom ILD level, and
- a top ILD level is disposed above the intermediate ILD levels, wherein a top metal level of the top ILD level serves as a pad level with pads;
- and
- forming a seal ring in the BEOL dielectric over the seal ring region of the substrate along with forming metal lines and via contacts, the seal ring comprises an inner moisture oxygen barrier (MOB) ring adjacent to the prime region and an outer crack stop (CS) ring adjacent to the kerf region, wherein
- the MOB ring includes
- MOB metal level metal line structures disposed in metal dielectric levels of the ILD levels except the top metal dielectric level,
- MOB via level metal line structures disposed in via dielectric levels of the ILD levels, and
- the MOB metal level metal line structures and the MOB via level metal line structures include MOB chamfered corners which are devoid of acute angles, and
- the CS ring includes
- CS metal level metal line structures disposed in metal dielectric levels of the ILD levels,
- CS via level metal line structures disposed in via dielectric levels of the ILD levels, and
- the CS metal level metal line structures and the CS via level metal line structures include CS chamfered corners which are devoid of acute angles.
20 more elements
A semiconductor device comprising:
- a substrate, the substrate includes
- a prime region having circuit components,
- a seal ring region surrounding the prime region, and
- a kerf region;
- a back-end-of-line (BEOL) dielectric disposed on the substrate covering the prime region with the circuit components, the seal ring region and the kerf region, the BEOL dielectric includes
- a plurality of interlevel dielectric (ILD) levels, an ILD level of the ILD levels includes
- a via dielectric level with via contacts,
- a metal dielectric level with metal lines,
- the metal lines and the via contacts of the ILD levels interconnect the circuit components of the prime region, and
- wherein
- a bottom ILD level is a first ILD level of the BEOL dielectric,
- one or more intermediate ILD levels is disposed above the bottom ILD level, and
- a top ILD level is disposed above the intermediate ILD levels, wherein a top metal level of the top ILD level serves as a pad level with pads;
- and
- a seal ring disposed in the BEOL dielectric over the seal ring region of the substrate, the seal ring comprises an inner moisture oxygen barrier (MOB) ring adjacent to the prime region and an outer crack stop (CS) ring adjacent to the kerf region, wherein
- the MOB ring includes
- MOB metal level metal line structures disposed in metal dielectric levels of the ILD levels,
- MOB via level metal line structures disposed in via dielectric levels of the ILD levels, and
- the MOB metal level metal line structures and the MOB via level metal line structures include MOB chamfered corners which are devoid of acute angles, and
- the CS ring includes
- CS metal level metal line structures disposed in metal dielectric levels of the ILD levels,
- CS via level metal line structures disposed in via dielectric levels of the ILD levels, and
- the CS metal level metal line structures and the CS via level metal line structures include CS chamfered corners which are devoid of acute angles.
20 more elements
Dependencies are inferred from the claim text.