Semiconductor device

A semiconductor device comprising:

• a semiconductor chip having a first surface and a second surface opposite to the first surface;
• an upper insulating layer provided on the first surface of the semiconductor chip;
• a lower insulating layer provided on the second surface of the semiconductor chip;
• an external pad disposed on the lower insulating layer and contacting the lower insulating layer;
• a via-hole penetrating the semiconductor chip and extending into the lower insulating layer to the external pad;
• a connection pad provided on the first surface;
• a via connected to the connection pad and provided in the via-hole so as to be electrically connected to the external pad, wherein the connection pad and the via comprise portions of a continuously formed same first material;
• a pad insulating layer provided on the first surface of the semiconductor chip, the pad insulating layer including a top surface contacting the first material forming a bottom surface of the connection pad, a first side surface contacting the first material forming a side of the via, and a second side surface contacting the upper insulating layer;
• and
• an external terminal provided directly on and electrically connected to the connection pad and vertically aligned with the via, the external terminal comprising solder,
• wherein the connection pad has a bottom directly connected to the via and has a top surface opposite to the bottom, and
• wherein the top surface of the connection pad is coplanar with a top surface of the upper insulating layer.

A semiconductor device comprising:

• a semiconductor chip having an active surface and a non-active surface opposite to the active surface;
• an upper insulating layer provided on the non-active surface of the semiconductor chip;
• a lower insulating layer provided on the active surface of the semiconductor chip;
• a connection pad provided on the non-active surface of the semiconductor chip;
• a via connected to the connection pad and provided in a via-hole, wherein the connection pad and the via comprise portions of a continuously formed same first material;
• a pad insulating layer provided on the non-active surface of the semiconductor chip, the pad insulating layer including a top surface contacting the first material forming a bottom surface of the connection pad, a first side surface contacting the first material forming a side of the via, and a second side surface contacting the upper insulating layer;
• and
• an external terminal provided directly on and electrically connected to the connection pad and vertically aligned with the via, the external terminal comprising solder,
• wherein the connection pad has a first surface exposed outside the upper insulating layer, a second surface opposite to the first surface and facing the semiconductor chip, and a first sidewall extending in a vertical direction from the first surface to the second surface and contacting the upper insulating layer,
• wherein the upper insulating layer is a continuous layer that extends from the first sidewall to contact a second sidewall of an adjacent connection pad, and
• wherein the first surface of the connection pad is coplanar with an upper surface of the upper insulating layer.