Method of fabrication of a FET transistor having an overlapped gate

A method for making at least one FET transistor, including:

• making a gate stack, comprising at least one layer of gate dielectric on which a layer of gate conducting material is arranged, on a layer of crystalline semiconductor,
• etching the layer of gate conducting material such that a remaining portion of the layer of gate conducting material fully covers a first portion of the layer of semiconductor intended to form an active zone of the transistor and at least one second portion of the layer of semiconductor intended to be adjacent to the active zone,
• implanting atoms, or dopants, or atoms and dopants, in the layer of semiconductor, making the semiconductor located around the first portion as well as the semiconductor of the second portion amorphous and preserving the crystalline nature of the semiconductor of the first portion which forms the active zone,
• etching the remaining portion of the layer of gate conducting material and the layer of gate dielectric according to a gate pattern covering a part of the first portion and at least one part of the second portion, forming the gate of the transistor and at least one gate overflow,
• etching the amorphous semiconductor of the layer of semiconductor.