US 10,121,706 B2 · Semiconductor structure including two-dimensional and three-dimensional bonding materials

Abstract

One aspect of the disclosure is directed to a method of forming a semiconductor structure. The method including: removing each fin in a set of fins from between insulator pillars to expose a portion of a substrate between each insulator pillar, the substrate having a first device region and a second device region; forming a first material over the exposed portions of the substrate between each insulator pillar, the first material including a two-dimensional material; forming a second material over the first material in the first device region, the second material including a first three-dimensional bonding material; and forming a third material over the exposed first material in the second device region, the third material including a second three-dimensional bonding material.

Claims9

Dependent claims

A semiconductor structure comprising:

a set of fins over a substrate, each fin in the set of fins comprising a three-dimensional bonding material;
an insulator pillar on the substrate between each fin in the set of fins;
and
a two dimensional material layer positioned directly between the three-dimensional bonding material and the substrate, and between the three-dimensional bonding material and each insulator pillar.

1 more element

A semiconductor structure comprising:

a first device region and a second device region over a substrate;
wherein the first device region includes:
a first set of fins over the substrate, each fin in the first set of fins being separated from an adjacent fin in the first set of fins by an insulator pillar in a set of insulator pillars, and each fin in the first set of fins comprising a first three-dimensional bonding material, and
wherein the second device region includes:
a second set of fins on the substrate, each fin in the second set of fins being separated from an adjacent fin in the second set of fins by another insulator pillar in the set of insulator pillars, and each fin in the second set of fins comprising a second three-dimensional bonding material;
and
a two-dimensional material layer directly between the substrate and the first three-dimensional bonding material, between the insulator pillar and the first three-dimensional bonding material, between the substrate and the second three-dimensional bonding material, and between the another insulator pillar and the second three-dimensional bonding material.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application

15/361,809Filed 28 Nov 2016

Published

US 2018/0151449 A131 May 2018

Granted

6 Nov 2018

Term ends

Not estimatedThe source records don’t support an estimate.

Classification15 codes

H10D 84/038
Using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology: using silicon technology, e.g. SiGe
H10D 30/62
Insulated-gate field-effect transistors [IGFET]: fin field-effect transistors [FinFET]
H10D 30/6212
Fin field-effect transistors [FinFET]: having fin-shaped semiconductor bodies having non-rectangular cross-sections
H10D 62/115
Isolations within a component, i.e. internal isolations: dielectric isolations, e.g. air gaps

Semiconductor structure including two-dimensional and three-dimensional bonding materials

Life of this patent

Semiconductor structure including two-dimensional and three-dimensional bonding materials

Life of this patent

Abstract

Claims9