Selector device for two-terminal memory
AssigneeCrossbar, Inc.
InventorSung Hyun Jo
Life of this patent
Estimating the term…
Abstract
Solid-state memory having a non-linear current-voltage (I-V) response is provided. By way of example, the solid-state memory can be a selector device. The selector device can be formed in series with a non-volatile memory device via a monolithic fabrication process. Further, the selector device can provide a substantially non-linear I-V response suitable to mitigate leakage current for the non-volatile memory device. In various disclosed embodiments, the series combination of the selector device and the non-volatile memory device can serve as one of a set of memory cells in a 1-transistor, many-resistor resistive memory cell array.
Claims20
A semiconductor device comprising:
- a selector device comprising:
- a first electrode structure comprising a first material having a first plurality of metal particles, wherein the first material is configured to generate conductive ions of the first plurality of metal particles in response to a first voltage exceeding a first threshold voltage applied to the first electrode structure;
- a second electrode structure comprising a second material having a second plurality of metal particles, wherein the second material is configured to generate conductive ions of the second plurality of metal particles in response to a second voltage exceeding a second threshold voltage applied to the second electrode structure;
- and
- a selector structure comprising a selector material, disposed in contact with and in between the first electrode structure and the second electrode structure, wherein the selector material is configured to allow the conductive ions of the first plurality of metal particles to permeate therein in response to the first voltage applied to the first electrode structure, and wherein the selector material is configured to allow the conductive ions of the second plurality of metal particles to permeate therein in response to the second voltage applied to the second electrode structure;
- and
- a two-terminal memory device coupled in series with the selector device.
A semiconductor device comprises:
- a semiconductor substrate;
- a selector device disposed above the semiconductor substrate, wherein the selector device comprises:
- a first electrode disposed above the semiconductor substrate, wherein the first electrode comprises a first plurality of metal particles, wherein the first electrode is configured to generate conductive ions of the first plurality of metal particles, in response to a first bias applied across the selector device, wherein a magnitude of the first bias exceeds a magnitude of a first bias threshold;
- a second electrode disposed above the semiconductor substrate, wherein the second electrode comprises a second plurality of metal particles, wherein the second electrode is configured to generate conductive ions of the second plurality of metal particles, in response to a second bias applied across the selector device, wherein a polarity of the first bias is opposite of a polarity of the second bias;
- and
- an insulating material layer disposed adjacent to and in contact with the first electrode and the second electrode, wherein the insulating material layer comprises a selector material having a plurality of defects in absence of a bias being applied across the selector device, wherein the insulating material layer is selected from a group consisting of:
- an undoped amorphous silicon material, a non-stoichiometric oxide, SiOx, TaOb (where b is a suitable positive number), HfOc (where c is a suitable positive number), TiOd (where d is a suitable number), and Al2Oe (where e is a suitable positive number), wherein the insulating material layer is configured to allow conductive ions of the first plurality of metal particles to occupy first defect locations from the plurality of defects in response to the first bias applied across the selector device, and wherein the insulating material layer is configured to allow conductive ions of the second plurality of metal particles to occupy second defect locations from the plurality of defects in response to the second bias applied across the selector device;
- and
- a two-terminal memory disposed above the insulated semiconductor substrate and coupled in series with the selector device.
A method of operating a semiconductor device having a memory device including a selector device and a two-terminal memory component, comprising:
- applying a first switching voltage of a first polarity to a first terminal of the memory device, the first switching voltage having a magnitude larger than a first threshold voltage associated with the selector device, thereby:
- generating conductive ions of a first plurality of metal particles in a first electrode of the selector device, disposing the conductive ions of the first plurality of metal particles into first defect locations of a selector material of the selector device that is disposed adjacent to the first electrode, and performing a first memory operation on the two-terminal memory component;
- and
- applying a second switching voltage of a second polarity to the first terminal of the memory device, the second switching voltage having a magnitude larger than a second threshold voltage associated with the selector device, thereby:
- generating conductive ions of a second plurality of metal particles in a second electrode of the selector device, disposing the conductive ions of the second plurality of metal particles into second defect locations of the selector material of the selector device that is disposed adjacent to the second electrode, and performing a second memory operation on the two-terminal memory component.
Dependencies are inferred from the claim text.