Active matrix display device and method of driving same

An active matrix LCD display having a plurality of source lines, a plurality of gate lines crossed with the source lines and a plurality of storage capacitor address lines, independently addressable pixels being provided at intersections of the source and gate lines, a pixel comprising a plurality of sub-pixels and each sub-pixel of a pixel being associated with a respective one of the storage capacitor address lines;

• the display having drive circuitry for, in a first mode, in response to input data for a pixel for a frame of image data, supplying a plurality of signal voltages for the frame to the source line of the pixel, and supplying a plurality of capacitor line voltages, each of the capacitor line voltages being supplied to a respective storage capacitor address line of the pixel;
• wherein the drive circuitry is adapted to supply the signal voltages and the capacitor line voltages such that the root-mean-square (RMS) voltage applied over the frame across a first of the sub-pixels is controllable at least partially independently of the RMS voltage applied over the frame across a second of the sub-pixels;
• and
• wherein a relationship between the RMS voltages across the first and second sub-pixels is independent between pixels in a row addressed by common capacitor lines.

A method of driving an active matrix LCD display, the display having a plurality of source lines, a plurality of gate lines crossed with the source lines and a plurality of storage capacitor address lines, independently addressable pixels being provided at intersections of the source and gate lines, a pixel comprising a plurality of sub-pixels and each sub-pixel of a pixel being associated with a respective one of the storage capacitor address lines, the method comprising, in a first mode:

• in response to input data for a pixel for a frame of image data, supplying a plurality of signal voltages for the frame to the source line of the pixel and supplying a plurality of capacitor line voltages, each of the capacitor line voltages being supplied to a respective storage capacitor address line of the pixel;
• wherein the method comprises supplying the capacitor line voltages such that the relationship between at least a first one of the capacitor line voltages and a second one of the capacitor line voltages supplied in a first display refresh period of the frame is different to the relationship between the first of the capacitor line voltages and the second of the capacitor line voltages supplied in a subsequent display refresh period of the frame;
• and
• supplying the signal voltages and the first one of the capacitor line voltages in the first and second display refresh periods of the frame such that the root-mean-square (RMS) voltage applied over the frame across a first of the sub-pixels is controllable at least partially independently of the RMS voltage applied over the frame across a second of the sub-pixels;
• wherein a relationship between the RMS voltages across the first and second sub-pixels is independent between pixels in a row addressed by common capacitor lines.