AMOLED pixel driver circuit and pixel driving method

An active matrix organic light-emitting diode (AMOLED) pixel driving method, which comprises:

• Step 1:
• providing an AMOLED pixel driver circuit, comprising:
• a first thin film transistor (TFT), a second TFT, a third TFT, a first capacitor, a second capacitor, and an organic light-emitting diode (OLED);
• the first TFT having the gate connected to a first node, the source connected to a second node and the drain connected to a power supply;
• the second TFT having the gate connected to a scan signal voltage, the source connected to a data signal voltage and the drain connected to the first node and the gate of the first TFT;
• the third TFT having the gate connected to a control signal voltage, the drain connected to the second node and the source of the first TFT, and the source connected to the anode of the OLED;
• the first capacitor having one end connected to the first node and the other end connected to the second node;
• the second capacitor having one end connected to the drain of the first TFT and the other end connected to the source of the first TFT;
• the OLED having cathode connected to the ground;
• the power supply being a constant high voltage;
• Step 2:
• entering reset phase:
• the scan signal voltage and the control signal voltage providing high level, and the data signal voltage providing a reference low level Vref, the second TFT turned on, the reference low level of the data signal voltage being written into the first node (i.e., the gate of the first TFT), the third TFT turned on, the first TFT cut off, voltage level of the anode of the OLED being written into the second node (i.e., the source of the first TFT);
• Step 3:
• entering threshold voltage detection phase:
• the scan signal voltage remaining high level, the control signal voltage transiting to low level, and the data signal voltage remaining a reference low level, the second TFT turned on, the first node (i.e., the gate of the first TFT) remaining the reference low level, the third TFT cut off, the second node (i.e., the source of the first TFT) changed to Vref-Vth, wherein Vth being threshold voltage of the first TFT;
• Step 4:
• entering threshold voltage compensation phase:
• the scan signal voltage first remaining high level and then transiting to low level, the control signal voltage remaining low level, and the data signal voltage providing a display data signal high level, the second TFT turned on, the third TFT cut off, the data signal voltage writing the display data signal high level via the second TFT into the first node (i.e., the gate of the first TFT) and the first capacitor, the second node (i.e., the source of the first TFT) transiting to Vref-Vth+ΔV, wherein ΔV being influence on the source voltage of the first TFT (i.e., the second node) caused by the display data signal high level voltage;
• and
• Step 5:
• entering light-emitting phase:
• the scan signal voltage remaining low level, the control signal voltage transiting to high level, and the data signal voltage transiting to low level, the second TFT cut off, the third TFT turned on, voltage difference between the first node (i.e., the gate of the first TFT) and the second node (i.e., the source of the first TFT) remaining unchanged due to storage effect of the first capacitor;
• the OLED emitting light and current flowing through the OLED independent of the threshold voltage of the first TFT.

An active matrix organic light-emitting diode (AMOLED) pixel driver circuit, which comprises:

• a first thin film transistor (TFT), a second TFT, a third TFT, a first capacitor, a second capacitor, and an organic light-emitting diode (OLED);
• the first TFT having the gate connected to a first node, the source connected to a second node and the drain connected to a power supply;
• the second TFT having the gate connected to a scan signal voltage, the source connected to a data signal voltage and the drain connected to the first node and the gate of the first TFT;
• the third TFT having the gate connected to a control signal voltage, the drain connected to the second node and the source of the first TFT, and the source connected to the anode of the OLED;
• the first capacitor having one end connected to the first node and the other end connected to the second node;
• the second capacitor having one end connected to the drain of the first TFT and the other end connected to the source of the first TFT;
• the OLED having cathode connected to the ground;
• the power supply being a constant high voltage, the control signal voltage being a high level single pulse, the data signal voltage being a high level pulse;
• wherein the first TFT, the second TFT and the third TFT beingre all low temperature polysilicon (LTPS) TFTs, oxide semiconductor TFTs or amorphous silicon (a-Si) TFTs;
• wherein the scan signal voltage, the control signal voltage and the data signal voltage are all generated by an external timing controller.