Global routing framework of integrated circuit based on localized routing optimization

A processing system for global routing of integrated circuits based on localized routing optimization comprising:

• a processor configured to perform global routing of an integrated circuit;
• a graphical user interface configured to display layout of the integrated circuit, and allow a user to perform global and detail routing manually;
• and
• a memory storing computer executable instructions having an integrated circuit processing module, and a global and detailed routing module,
• wherein when executed at the processor of the processing system, the computer executable instructions cause the processor to perform:
• defining, by the integrated circuit processing module, one or more regions of an integrated circuit;
• assigning, by the integrated circuit processing module, at least one optimization objective with each region defined;
• generating, by the integrated circuit processing module, one or more constraints for each region based on the assigned at least one optimization objective, wherein the generating comprises:
• adding corresponding optimization objectives in a region to a corresponding constraints for each of the one or more regions when solution space for nets contains a route that at least one segment is in the corresponding net of the region;
• and
• performing, by the global and detailed routing module, global and detailed routing of each of one or more segments of a net of the integrated circuit according to the optimization objective and the one or more constraints of the region;
• causing, by the processor, the integrated circuit to be fabricated.

A computer program product comprising:

• a non-transitory storage medium readable by a processor and storing computer executable instructions for execution by the processor to perform a method of global routing of integrated circuits based on localized routing optimization, the method comprising:
• defining, using the processor, one or more regions, one or more netgroups, and combinations thereof of an integrated circuit;
• associating, using the processor, at least one optimization objective with each region and/or each netgroup defined;
• generating, using the processor, one or more constraints for each region and/or each netgroup based on the associated at least one optimization objective, wherein the generating comprises:
• adding corresponding optimization objectives in a region to a corresponding constraints for each of the one or more regions when solution space for nets contains a route that at least one segment is in the corresponding net of the region and/or the corresponding netgroup;
• and
• performing, using the processor, global routing of each of one or more segments of a net of the integrated circuit according to the optimization objective and the one or more constraints of the region;
• causing, by the processor, the integrated circuit to be fabricated.